1. Field of the Invention
The present invention relates to a flat panel display device and method of fabricating the same and more particularly to an active matrix flat panel display device and method of fabricating the same.
2. Description of the Related Art
An active matrix flat panel display device may include unit pixels arranged in a matrix form. For an active matrix flat panel display device, each unit pixel may include at least one thin film transistor (TFT), a pixel electrode controlled by the TFT, and an opposite electrode facing the pixel electrode. An organic light-emitting device is a device in which an organic emission layer is interposed between a pixel electrode and an opposite electrode. In contrast, a liquid crystal device is a device in which a liquid crystal layer is interposed between the pixel electrode and the opposite electrode.
FIG. 1 is a cross-sectional view illustrating a TFT of a flat panel display device according to the prior art.
As shown in FIG. 1, a semiconductor layer 20 may be formed on a substrate 10. A gate insulating layer 30 covering the semiconductor layer 20 may be formed on the semiconductor layer 20. A gate electrode 40 may be formed on the gate insulating layer 30. An interlayer 50 that covers the gate electrode 40 may be formed. Contact holes 50a that expose both ends of the semiconductor layer 20 may be formed in the interlayer 50. Source/drain electrodes 55 located on the interlayer 50 and contacting both ends of the semiconductor layer 20 through the contact holes 50a may be formed. In forming the source/drain electrodes 55, a signal wiring of the flat panel display device (not shown) can be formed together.
The source/drain electrodes 55 and the signal wiring may be formed of Mo. However, the Mo has high specific resistance. This means that it may increase wiring resistance of the signal wiring, creating a signal delay in the signal wiring. The signal delay may cause image quality degradation in a flat panel display.
To address this, there was an attempt to form the source/drain electrodes 55 and the signal wiring with a double layer including a Mo layer and a low-resistance Al layer on the Mo layer. However, if any of the source/drain electrodes 55 contacts an ITO layer (such as the pixel electrode (not shown)), an oxide layer can form between the Al layer and the ITO layer. Thus, the contact resistance between the pixel electrode and the source/drain electrode 55 can be increased.